SN84LS393N

The counting through the sixteen cycles in a logic cycle and the cycling through all the voices is done by a 84LS393 circuit which forms counter 160 of FIG. 7, whose outputs are latched at the beginning of each clock cycle by 0.sub.1 (start of phase 1) by a 84LS273 circuit forming latch 119. The four low-order bits of counter latch 119 are named S.sub.3, S.sub.2, S.sub.1, and S.sub.0 and their binary value defines the number of the current cycle. For example, for cycle 5 they equal the binary code 0101. The four high-order bits are used to determine the four voice-identification bits V.sub.3, V.sub.2, V.sub.1, and V.sub.0 (after possibly being remapped if voice coalescing is specified) which form the high-order part on lines 121-2 of all addresses sent to memory 120. The reason that outputs from the counter latch 119 are used rather than from the counter directly is that the 74LS393 circuit of counter 160 is a rather slow ripple-carry counter and a considerable amount of time is needed for the carry to propagate to the high-order bits. The propagation delay would detract from the memory access time if these bits were directly used as address bits. By latching the counter outputs and then immediately instructing the counter to increment its contents, the full duration of the clock cycle is available both for the memory access and for the counter incrementation. An additional advantage of this latching scheme is that the four low-order bits from the counter can be used for "look-ahead" since during the latter part of a cycle they contain the number of the next cycle. These four low-order bits are called the T bits T.sub.3, T.sub.2, T.sub.1, and T.sub.0 and represent a binary number which is often greater than that contained in the corresponding S bits (for most of the cycle). These T bits are used in various places in the circuit where look-ahead is necessary or convenient. The higher-order T.sub.4,5,6,7 bits from stage 160-1 take longer to stabilize and are not used for this purpose.