DM74S189N

High-speed 64-bit Transistor-Transistor Logic (TTL) Static RAM (SRAM) integrated circuit - Key Technical SpecificationsMemory Organization: 16 words by 4 bits (16 × 4 configuration).Output Type: 3-State (Tri-State) outputs. The outputs enter a high-impedance state when the Chip Select (\(\overline{\text{CS}}\)) pin is HIGH, making it safe to connect directly to shared data buses.Data Inversion: The outputs provide the complement (inverted version) of the stored data during read operations.Speed: Fast access time of 35 ns.Supply Voltage: Standard TTL \(V_{CC}\) of 5V.Standard Pinout Configuration (PDIP-16)The IC features a standard 16-pin layout:Pin NumberSymbolFunction1, 13, 14, 15A₀, A₃, A₂, A₁Address Inputs (to select 1 of 16 words)2\(\overline{\text{CS}}\)Chip Select (Active LOW)3\(\overline{\text{WE}}\)Write Enable (Active LOW)4, 6, 10, 12D₁, D₂, D₃, D₄Data Inputs (Data to be written)5, 7, 9, 11\(\overline{O}_1, \overline{O}_2, \overline{O}_3, \overline{O}_4\)Inverted Data Outputs (Data being read)8GNDGround16\(V_{CC}\)+5V Power Supply